PM5362TUPP-PLUS
DATA SHEET
PMC-951010
ISSUE 6
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR / PERFORMANCE MONITOR
Pin Name Type
Pin
Function
No.
NSCLK
Input
147
The nibble interface mode system clock
(NSCLK) provides timing for TUPP-PLUS
internal operations in incoming or outgoing
nibble interface mode (IBMODE or OBMODE
set low). NSCLK is a 38.88 MHz, nominally 50%
duty cycle, clock.
In incoming nibble interface mode (IBMODE set
low), IC1J1, IPL, ITMF, IDP, ID[3:0] are sampled
on the rising edge of NSCLK. In outgoing nibble
interface mode (OBMODE set low), OTMF,
OC1J1 and OPL are sampled on the rising edge
of NSCLK, and ODP, OTPL, OTV5, OD[7:0],
AIS, IDLE, TPOH, LC1J1V1, LPL, and LOM[3:1]
are updated on the rising edge of NSCLK.
When the incoming and the outgoing interfaces
are in byte mode (IBMODE and OBMODE both
set high), NSCLK may be left unconnected.
NSCLK has an integral pull-up resistor.
IBMODE
Input
145
The incoming byte interface mode signal
(IBMODE) configures the incoming interface
mode of the TUPP-PLUS. When IBMODE is set
low, nibble interface mode is selected. SCLK
must be connected to GSCLK[0]. IC1J1, IPL,
ITMF, IDP, ID[3:0] are sampled on the rising
edge of NSCLK. When IBMODE is set high,
byte interface mode is selected. IC1J1, IPL,
ITMF, IDP, ID[7:0] are sampled on the rising
edge of SCLK. IBMODE has an integral pull-up
resister.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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