STANDARD PRODUCT
PM4351 COMET
DATA SHEET
PMC-1970624
ISSUE 10
COMBINED E1/T1 TRANSCEIVER
The E1-FRMR extracts the contents of the International bits (from both the FAS
frames and the NFAS frames), the National bits, and the Extra bits (from timeslot
16 of frame 0 of the CAS multiframe), and stores them in the E1-FRMR
International/National Bits register and the E1-FRMR Extra Bits register.
Moreover, the FRMR also extracts submultiframe-aligned 4-bit codewords from
each of the National bit positions Sa4 to Sa8, and stores them in
microprocessor-accessible registers that are updated every CRC submultiframe.
The E1-FRMR identifies the raw bit values for the Remote (or distant frame)
Alarm (bit 3 in timeslot 0 of NFAS frames) and the Remote Signaling Multiframe
(or distant multiframe) Alarm (bit 6 of timeslot 16 of frame 0 of the CAS
multiframe) via the E1-FRMR International/National Bits Register, and the
E1-FRMR Extra Bits Register respectively. Access is also provided to the
"debounced" remote alarm and remote signaling multiframe alarm bits which are
set when the corresponding signals have been a logic 1 for 2 or 3 consecutive
occurrences, as per Recommendation O.162. Detection of AIS and timeslot 16
AIS are provided. AIS is also integrated, and an AIS Alarm is indicated if the AIS
condition has persisted for at least 100 ms. The out of frame (OOF=1) condition
is also integrated, indicating a Red Alarm if the OOF condition has persisted for
at least 100 ms.
An interrupt may be generated to signal a change in the state of any status bits
(OOF, OOSMF, OOCMF, AIS or RED), and to signal when any event (RAI, RMAI,
AISD, COFA, FER, SMFER, CMFER, CRCE or FEBE) has occurred.
Additionally, interrupts may be generated every frame, CRC submultiframe, CRC
multiframe or signaling multiframe.
Basic Frame Alignment Procedure
The E1-FRMR searches for basic frame alignment using the algorithm defined in
ITU-T Recommendation G.706 sections 4.1.2 and 4.2.
The algorithm finds frame alignment by using the following sequence:
1. Search for the presence of the correct 7-bit FAS (‘0011011’);
2. Check that the FAS is absent in the following frame by verifying that bit 2 of
the assumed non-frame alignment sequence (NFAS) TS 0 byte is a logic 1;
3. Check that the correct 7-bit FAS is present in the assumed TS 0 byte of the
next frame.
If either of the conditions in steps 2 or 3 are not met, a new search for frame
alignment is initiated in the bit immediately following the second 7-bit FAS
sequence check. This "hold-off" is done to ensure that new frame alignment
PROPRIETARY AND CONFIDENTIAL
40
PMC [ PMC-SIERRA, INC ]
