PM4341AT1XC
DATA SHEET
PMC-900602
ISSUE 7
T1 FRAMER/TRANSCEIVER
9
REGISTER DESCRIPTION
9.1 Normal Mode Register Memory Map
Address
Register
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
10H
11H
12H
13H
14H
15H
16H
17H
18H
T1XC Receive Options
T1XC Receive Backplane Options
T1XC Datalink Options
T1XC Receive DS1 Interface Configuration
T1XC Transmit DS1 Interface Configuration
T1XC Transmit Backplane Options
T1XC Transmit Framing and Bypass Options
T1XC Transmit Timing Options
T1XC Master Interrupt Source #1
T1XC Master Interrupt Source #2
T1XC Master Diagnostics
T1XC Master Test
T1XC Revision/Chip ID
T1XC Master Reset
T1XC Phase Status Word (LSB)
T1XC Phase Status Word (MSB)
CDRC Configuration
CDRC Interrupt Enable
CDRC Interrupt Status
CDRC Reserved
XPLS Line Length Configuration
XPLS Control/Status
XPLS CODE Indirect Address
XPLS CODE Indirect Data
DJAT Interrupt Status
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
59
PMC [ PMC-SIERRA, INC ]
