PM4341AT1XC
DATA SHEET
PMC-900602
ISSUE 7
T1 FRAMER/TRANSCEIVER
Bit oriented codes are received on the Facility Data Link channel as a 16-bit
sequence consisting of 8 ones, a zero, 6 code bits, and a trailing zero
(111111110xxxxxx0) which is repeated at least 10 times.The RBOC can be
enabled to declare a received code valid if it has been observed for 8 out of 10
times or for 4 out of 5 times, as specified by the AVC bit in the control register.
Valid BOC are indicated through an internal status register. The BOC bits are set
to all ones (111111) if no valid code has been detected. An interrupt is generated
to signal when a detected code has been validated, or optionally, when a valid
code goes away (i.e. the BOC bits go to all ones).
8.10 HDLC Receiver (RFDL)
The HDLC Receiver function is provided by the RFDL block.The RFDL is a
microprocessor peripheral used to receive LAPD/HDLC frames on the ESF
facility data link (FDL).
The RFDL detects the change from flag characters to the first byte of data,
removes stuffed zeros on the incoming data stream, receives frame data, and
calculates the CRC-CCITT frame check sequence (FCS).
Received data is placed into a 4-level FIFO buffer. The Status Register contains
bits which indicate overrun, end of message, flag detected, and buffered data
available.
On end of message, the Status Register also indicates the FCS status and the
number of valid bits in the final data byte. Interrupts are generated when one,
two or three bytes (programmable via the RFDL configuration register) are stored
in the FIFO buffer. Interrupts are also generated when the terminating flag
sequence, abort sequence, or FIFO buffer overrun are detected.
When the internal HDLC receiver is disabled, the serial data extracted by the
FRMR block is output on the RDLSIG pin updated on the falling clock edge
output on the RDLCLK pin. Optionally, when the internal HDLC receiver is used,
the D-channel of the Primary Rate interface can be output on the RDLSIG pin
updated on the falling clock edge of RDLCLK.
8.11 Alarm Integrator (ALMI)
The Alarm Integration function is provided by the ALMI block.This block detects
the presence of YELLOW, RED, and AIS Carrier Fail Alarms (CFA) in SF, T1DM,
SLC®96, or ESF formats.The alarm detection and integration is compatible with
the specifications defined in Bell Pub 43801, TA-TSY-000278, TR-TSY-000008,
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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PMC [ PMC-SIERRA, INC ]
