PM4341AT1XC
DATA SHEET
PMC-900602
ISSUE 7
T1 FRAMER/TRANSCEIVER
Register 36H: XFDLTransmit Data
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
TD7
TD6
TD5
TD4
TD3
TD2
TD1
TD0
X
X
X
X
X
X
X
X
Data written to this register is serialized and transmitted on the facility data link
least significant bit first.The XFDL signals when the next data byte is required by
setting the TDLINT output high (if enabled) and by setting the INT bit in the
Status register high. When INT and/or TDLINT is set, the Transmit Data register
must be written with the new data within 4 data bit periods to prevent the
occurrence of an underrun. At a 4 kbit/sec FDL data rate this period
corresponds to 1.00 ms.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
140
PMC [ PMC-SIERRA, INC ]
