PM4341AT1XC
DATA SHEET
PMC-900602
ISSUE 7
T1 FRAMER/TRANSCEIVER
Register 2AH: RBOC Enable
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
Unused
Unused
Unused
IDLE
X
X
X
X
X
0
R/W
R/W
R/W
AVC
0
BOCE
0
This register selects the validation criteria to be used in determining a valid bit
oriented code (BOC) and enables generation of an interrupt on a change in code
status.
IDLE:
The IDLE bit position enables or disables the generation of an interrupt when
there is a transition from a validated BOC to idle code. A logic 1 in this bit
position enables generation of an interrupt; a logic 0 in this bit position
disables interrupt generation.
AVC:
The AVC bit position selects the validation criteria used in determining a valid
BOC. A logic 1 in the AVC bit position selects the "alternate" validation
criterion of 4 out of 5 matching BOCs; a logic 0 selects the 8 out of 10
matching BOC criterion.
BOCE:
The BOCE bit position enables or disables the generation of an interrupt on
the microprocessor INTB pin when a valid BOC is detected. A logic 1 in this
bit position enables generation of an interrupt; a logic 0 in this bit position
disables interrupt generation.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
120
PMC [ PMC-SIERRA, INC ]
