PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
Register 00EH, 08EH, 10EH, 18EH, 20EH, 28EH, 30EH, 38EH:
Line Interface Diagnostics
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
LCVINS
LINELB
RAIS
X
X
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
DDLB
Reserved
Reserved
LCVINS:
The LCVINS bit introduces a single line code violation on the transmitted data stream. In
B8ZS, the violation is generated by masking the first violation pulse of a B8ZS signature. In
AMI, one pulse is sent with the same polarity as the previous pulse. In HDB3, the violation is
generated by causing the next HDB3-code generated bipolar violation pulse to be of the
same polarity as the previous bipolar violation. To generate another violation, this bit must
first be written to 0 and then to logic 1 again. At least one bit period should elapse between
writing LCVINS 0 and writing it 1 again, or vice versa, if an error is to be successfully
inserted. LCVINS has no effect when TDUAL is set to logic 1.
LINELB:
The LINELB bit selects the line loopback mode, where the recovered data are internally
directed to the digital inputs of the transmit jitter attenuator. The data sent to the TJAT is the
recovered data from the output of the CDRC block. When LINELB is set to logic 1, the line
loopback mode is enabled. When LINELB is set to logic 0, the line loopback mode is
disabled. Note that when line loopback is enabled, to correctly attenuate the jitter on the
receive clock, the contents of the TJAT Reference Clock Divisor and Output Clock Divisor
registers should be programmed to 2FH in T1 mode / FFH in E1 mode and the Transmit
Timing Options register should be cleared to all zeros. Only one of LINELB and DDLB can be
enabled at any one time.
RAIS:
When the RAIS bit is set to logic 1, the receive output data stream of the octant is forced to all
ones.
DDLB:
The DDLB bit selects the diagnostic digital loopback mode, where the octant is configured to
internally direct the output of the TJAT to the inputs of the receiver section. The dual-rail RZ
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
78
PMC [ PMC-SIERRA, INC ]
