PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
•
When FIFO_OVRE is a ‘1’ overrun interrupt generation is enabled.
DC_INT_EN:
This bit is set to enable the generation of an interrupt when either of the following events
occurs:
•
•
A Depth Check error
An external resynchronization event occurs on the DC1FP signal
DC_ENBL:
This bit enables depth check resets. The depth checker periodically monitors the link FIFO
depths and compares them against the read and write pointers. Discrepancies are reported in
the Depth Checker Interrupt Status Register. If DC_ENBL is ‘1’, the affected link is
automatically reset. If DC_ENBL is ‘0’, the link is not reset.
APAGE:
The tributary mapping register active page select bit (APAGE) controls the selection of one of
two pages of tributary mapping registers. When APAGE is set low, the configuration in page
A of the tributary mapping registers is used to associate SBI tributaries to LIU octant data
streams. When APAGE is set high, the configuration in page B of the tributary mapping
registers is used to associate SBI tributaries to LIU octant data streams. When APAGE
changes state, any data streams where the mapping registers do not match are automatically
reset.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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PMC [ PMC-SIERRA, INC ]
