欢迎访问ic37.com |
会员登录 免费注册
发布采购

PM4318 参数 Datasheet PDF下载

PM4318图片预览
型号: PM4318
PDF下载: 下载PDF文件 查看货源
内容描述: 八进制E1 / T1 / J1线路接口设备 [OCTAL E1/T1/J1 LINE INTERFACE DEVICE]
分类和应用:
文件页数/大小: 244 页 / 2135 K
品牌: PMC [ PMC-SIERRA, INC ]
 浏览型号PM4318的Datasheet PDF文件第54页浏览型号PM4318的Datasheet PDF文件第55页浏览型号PM4318的Datasheet PDF文件第56页浏览型号PM4318的Datasheet PDF文件第57页浏览型号PM4318的Datasheet PDF文件第59页浏览型号PM4318的Datasheet PDF文件第60页浏览型号PM4318的Datasheet PDF文件第61页浏览型号PM4318的Datasheet PDF文件第62页  
PRELIMINARY  
PM4318 OCTLIU  
DATASHEET  
PMC- 2001578  
ISSUE 3  
OCTAL E1/T1/J1 LINE INTERFACE DEVICE  
10  
NORMAL MODE REGISTER DESCRIPTION  
Normal mode registers are used to configure and monitor the operation of the OCTLIU. Normal  
mode registers (as opposed to test mode registers) are selected when A[10] is low.  
The Register Memory Map in Table 4 below shows where the normal mode registers are  
accessed. The OCTLIU contains 1 set of master configuration, SBI, and CSU registers and 8  
sets of T1/E1 LIU registers. Where only 1 set is present, the registers apply to the entire device.  
Where 8 sets are present, each set of registers apply to a single octant of the OCTLIU. By  
convention, where 8 sets of registers are present, address space 000H – 07FH applies to octant  
#1, 080H – 0FFH applies to octant #2, etc, up to 380H – 3FFH for octant #8.  
On reset the OCTLIU defaults to T1 mode. For proper operation some register configuration is  
expected. By default interrupts will not be enabled, and automatic alarm generation is disabled.  
Notes on Normal Mode Register Bits:  
1. Writing values into unused register bits has no effect. Reading back unused bits can produce  
either a logic 1 or a logic 0; hence, unused register bits should be masked off by software  
when read.  
2. All configuration bits that can be written into can also be read back. This allows the  
processor controlling the OCTLIU to determine the programming state of the chip.  
3. Writeable normal mode register bits are cleared to zero upon reset unless otherwise noted.  
4. Writing into read-only normal mode register bit locations does not affect OCTLIU operation  
unless otherwise noted.  
5. Certain register bits are reserved. These bits are associated with functions that are unused in  
this application. To ensure that the OCTLIU operates as intended, reserved register bits must  
only be written with their default values unless otherwise stated. Similarly, writing to reserved  
registers should be avoided unless otherwise stated.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
49