PM4314 QDSX
DATA SHEET
PMC-950857
ISSUE 5
QUAD T1/E1 LINE INTERFACE DEVICE
Register 001H, 041H, 081H, and 0C1H:Transmit Configuration
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
Unused
TDPINV
TDNINV
TDUAL
TFALL
X
X
X
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
CEPT
These registers enable the Transmit Interface to generate the required digital
output waveform format.
TDPINV,TDNINV:
The TDPINV and TDNINV bits enable the Transmit Interface to logically invert
the input signals on the TDD/TDP[X] and TDN[X] inputs, respectively. When
TDPINV is set to logic 1, the TDD/TDP[X] input is inverted. When TDPINV is
set to logic 0, the TDD/TDP[X] input is not inverted. When TDNINV is set to
logic 1, the TDN[X] input is inverted. When TDNINV is set to logic 0, the
TDN[X] input is not inverted.
TDUAL:
TDUAL configures the TDD/TDP[X] and TDN[X] inputs to unipolar or bipolar
form. When the TDUAL bit is set to logic 1, the bipolar inputs TDP[X] and
TDN[X] are enabled. When the TDUAL bit is set to logic 0, the unipolar input
TDD[X] is enabled and TDN[X] is ignored. The TDUAL bit is logically "ORed"
with the TDUAL input pin. If either are set to logic 1, then the bipolar inputs
will be enabled.
TFALL:
The TFALL bit enables the Transmit Interface to sample the TDD/TDP[X] and
TDN[X] inputs on the falling TCLKI[X] edge. When TFALL is set to logic 1, the
interface is enabled to sample the inputs on the falling TCLKI[X] edge. When
TFALL is set to logic 0, the interface is enabled to sample the inputs on the
rising TCLKI[X] edge.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
58
PMC [ PMC-SIERRA, INC ]
