PLL500-27B/-37B/-47B
Low Power CMOS Output VCXO Family (27MHz to 200MHz)
5. DC Specification
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
FXIN = 36MHz, 15pF output load
FXIN = 77MHz, 15pF output load
FXIN = 155MHz, 15pF output load
PLL500-27
5
6
12
Supply Current, Dynamic,
with Loaded Outputs
IDD
mA
10
15
18
N/A
15
pF
pF
pF
V
Allowable output load
capacitance
CL
(Output)
PLL500-37 and-47: Std drive
PLL500-37 and-47: High drive
10
Operating Voltage
Output High Voltage
Output Low Voltage
VDD
VOH
VOL
2.25
2.4
3.63
IOH = -12mA
IOL = 12mA
V
0.4
V
Output High Voltage at
CMOS level
IOH = -4mA
VDD – 0.4
V
Standard drive at TTL level
High drive at TTL level
12
36
17
51
Output drive current
mA
Short Circuit Current
VCXO Control Voltage
ESD Protection
mA
V
±50
VCON
0
3.3
Human Body Model
2000
V
6. Crystal Specifications
PARAMETERS
SYMBOL
MIN.
TYP.
MAX.
UNITS
Crystal Loading Rating (VCON = 1.65V)
8.5
pF
CL
(xtal)
Maximum Sustainable Drive Level
Operating Drive Level
Max C0 for PLL500-27
Max C0 for PLL500-37
Max C0 for PLL500-47
C0/C1
200
µW
µW
50
3.5
2.5
2
pF
250
-
ESR
RS
30
Ω
Note: The crystal must be such that it oscillates (parallel resonant) at nominal frequency when presented a C Load as specified above.
If the crystal requires more load to be at nominal frequency, the additional load must be added externally.
This however may reduce the pull range.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 09/13/04 Page 4
PLL [ PHASELINK CORPORATION ]
