PAH8002EP-2P Product Datasheet
Low Power Optical Heart Rate Detection Chip
PixArt Imaging Inc.
4.3.2 Schematic Design- Printing Cover Type
Figure 8 Reference Application Circuit–Printing Cover Type
4.4 Design Guidelines
4.4.1 Schematic Design
1. VDDM & VDDIO: 3.3V~3.6V (for 3.3V System)
2. VDDM: 3.3V~3.6V, VDDIO: 1.62V~1.98V (for 1.8V System)
3. It is recommended to separate the power system for VDDM to avoid power interference.
4. SPI_SDI_I2C_SDA and SPI_SCLK_I2C_SCL pull high to VDDIO with resistor for I2C Only
5. VDDD, VDDA28 must have 1µF and VBGP must have 0.1µF capacitor connecting to GND and place closely to 8002.
6. The GND1, GND2 and GND3 must be separated and connected to PCB main GND.
7. INT pin is recommended to be connected to MCU HW INT as data ready INT for power saving.
8. Ensure that the VDDM and VDDIO’s power noise should be under 100mV (with 0.1µF and 10µF capacitor)
9. Tie SPI_I2C pin to VDDIO for SPI or tie to GND for I2C.
10. At power on, VDDM and VDDIO must be powered on at the same time or VDDIO to be powered on before VDDM.
※When VDDIO to be powered on before VDDM, the host should prevent using the I2C interface (that is connected
with 8002) to switch on the LDO providing VDDM voltage.
11. At power off, VDDM and VDDIO must be powered off at the same time or VDDM to be powered off first before
VDDIO.
Version 1.3 | 25 Sep 2017 | 31007AEN
PixArt Imaging Inc. http://www.pixart.com
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