Philips Semiconductors
Objective specification
Integrated PAL and PAL/NTSC TV
processors
TDA8360; TDA8361; TDA8362
Table 1 Audio and CVBS switch selection.
LEVEL
(pin 16)
INTERNAL
CVBS
EXTERNAL
CVBS/Y
CHROMINANCE
CHROMINANCE TRAP
AUDIO
DC ≤ 0.5 V
ON
OFF
OFF
OFF
OFF
ON
ON
OFF
ON
internal
external
external
3 ≤ DC ≤ 5 V
DC ≥ 7.5 V
ON (Y)
ON (CVBS)
OFF
Table 2 Output current of phase detector.
CURRENT Φ1 DURING
SCAN (µA)
VERTICAL RETRACE (µA)
GATED YES/NO
Weak signal and synchronized
Strong signal and synchronized
Not synchronized
30
180
180
6
30
270
270
6
YES (5.7 µs)
NO
NO
NO
No video identification
QUALITY SPECIFICATION
Quality level in accordance with UZW B0/FQ-0601.
SYMBOL PARAMETER
protection circuit specification (note 1)
RANGE A
RANGE B
UNIT
ESD
2000
100
200
200
0
V
pF
Ω
1500
Note
1. All pins are protected against ESD by means of internal clamping diodes.
March 1994
27
NXP [ NXP ]
