Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Reset output to the card (RST)
VIDLE
VOL
output voltage in IDLE mode
−
−
−
−
−
−
−
−
0.4
V
LOW level output voltage
HIGH level output voltage
IOL = 200 µA
−
0.45
VCC
VCC
2
V
VOH
IOH = −200 µA
IOH = −10 µA
4.0
V
V
−
−
−
CC − 0.7
V
tRST
tr
delay between RSTIN and RST
RST enabled; see Fig.6
CL = 330 pF
µs
µs
µs
rise time
fall time
1
tf
CL = 330 pF
1
Clock output to card (CLK)
VIDLE
VOL
output voltage in IDLE mode
−
−
−
−
−
−
−
−
−
−
0.4
V
LOW level output voltage
HIGH level output voltage
IOL = 200 µA
0.4
V
VOH
IOH = −200 µA
IOH = −20 µA
2.4
VCC + 0.3
VCC + 0.3
VCC + 0.3
18
V
0.7VCC
V
IOH = −10 µA
V
−
−
CC − 0.7
V
tr
tf
δ
rise time
fall time
CL = 30 pF; note 2
CL = 30 pF; note 2
ns
ns
%
18
duty factor
CL = 30 pF; (XTAL or
CLKIN used); note 2
45
55
∆δ/∆θ
thermal drift on duty factor
DIP and SO packages
−
−0.07
−
%/K
Card programming voltage (VPP
)
P
selected voltage
output voltage
see Table 1
idle mode
read mode
VPP
−
−
−
−
−
−
−
0.4
V
V
CC − 4%
VCC + 4%
P + 2.5%(3)
−50
V
write mode; IPP < 50 mA P − 2.5%(3)
V
IPP
output current
slew rate
read mode
write mode
−
−
−
mA
mA
mA
−50
write mode; VPP
−400
short-circuited to GND
SR
up or down
0.80
1.0
1.20
V/µs
High-voltage input (VH)
VH
IH
input voltage
−
−
−
30
3
V
input current at VH
idle mode
2
mA
active mode; unloaded;
WRITE = 0
P = 5 V
3
5
6
8
−
−
−
−
−
−
7
mA
mA
mA
mA
V
P = 12.5 V
P = 15 V
P = 21 V
10
11
13
2.2
VH − VPP voltage drop
1996 Dec 12
13
NXP [ NXP ]
