Philips Semiconductors
Product specification
I2C-bus autosync deflection controller for
PC monitors
TDA4841PS
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Automatic polarity correction for vertical sync
tVSYNC(max)
td(VPOL)
maximum width of vertical sync
pulse
−
−
−
400
µs
delay time for changing polarity
0.45
1.8
ms
Video clamping/vertical blanking output: pin CLBL
tclamp(CLBL)
Vclamp(CLBL)
width of video clamping pulse
measured at VCLBL = 3 V
0.6
0.7
0.8
µs
top voltage level of video
clamping pulse
4.32
4.75
5.23
V
TCclamp
temperature coefficient of
Vclamp(CLBL)
−
−
−
4
−
−
−
mV/K
ns/V
ns
STPSclamp
td(HSYNCt-CLBL)
steepness of slopes for
clamping pulse
RL = 1 MΩ; CL = 20 pF
50
130
delay between trailing edge of
horizontal sync and start of
video clamping pulse
clamping pulse triggered
on trailing edge of
horizontal sync;
control bit CLAMP = 0;
measured at VCLBL = 3 V
tclamp(max)
maximum duration of video
clamping pulse referenced to
end of horizontal sync
−
−
1.0
−
µs
ns
µs
V
td(HSYNCl-CLBL)
delay between leading edge of clamping pulse triggered
−
300
−
horizontal sync and start of
video clamping pulse
on leading edge of
horizontal sync;
control bit CLAMP = 1;
measured at VCLBL = 3 V
tclamp(max)
maximum duration of video
clamping pulse referenced to
end of horizontal sync
−
0.15
2.1
Vblank(CLBL)
tblank(CLBL)
top voltage level of vertical
blanking pulse
notes 1 and 2
1.7
1.9
width of vertical blanking pulse control bit VBLK = 0
220
305
−
260
350
2
300
395
−
µs
at pins CLBL and HUNLOCK
control bit VBLK = 1
µs
TCblank
temperature coefficient of
Vblank(CLBL)
mV/K
Vscan(CLBL)
TCscan
output voltage during vertical
scan
ICLBL = 0
0.59
0.63
0.67
V
temperature coefficient of
Vscan(CLBL)
−
−2
−
mV/K
Isink(CLBL)
IL(CLBL)
internal sink current
external load current
2.4
−
−
−
mA
mA
−
−3.0
1999 Oct 25
16
NXP [ NXP ]
