Philips Semiconductors
Product specification
I2C-bus autosync deflection controller for
PC monitors
TDA4841PS
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Phase adjustments and corrections via PLL1 and PLL2
HPOS
horizontal position (referenced register HPOS = 0
−
−
−
−
−13
−
%
to horizontal period)
register HPOS = 127
0
−
−
−
%
%
%
register HPOS = 255
13
−1.2
HPINBAL
horizontal pin unbalance
correction via HPLL2
(referenced to horizontal
period)
register HPINBAL = 0;
note 6
register HPINBAL = 63;
note 6
−
−
−
−
−
−
−
1.2
−
−
−
−
−
−
−
%
%
%
%
%
%
%
register HPINBAL = 32;
note 6
0.02
−1.2
1.2
HPARAL
HMOIRE
horizontal parallelogram
correction (referenced to
horizontal period)
register HPARAL = 0;
note 6
register HPARAL = 63;
note 6
register HPARAL = 32;
note 6
0.02
0
relative modulation of
horizontal position by
1⁄2 horizontal frequency;
phase alternates with
1⁄2 vertical frequency
register HMOIRE = 0;
control bit MOD = 0
register HMOIRE = 63;
control bit MOD = 0
0.02
moire cancellation off
control bit MOD = 1
−
0
−
−
%
%
PLL2 phase detector: pins HFLB and HPLL2
φPLL2
PLL2 control (advance of
maximum advance;
36
−
horizontal drive with respect to register HPINBAL = 32;
middle of horizontal flyback)
register HPARAL = 32
minimum advance; register
HPINBAL = 32; register
HPARAL = 32
−
7
−
%
Ictrl(PLL2)
PLL2 control current
−
−
75
28
−
−
µA
ΦPLL2
relative sensitivity of PLL2
phase shift related to horizontal
period
mV/%
VPROT(HPLL2)(max) maximum voltage for PLL2
protection mode/soft start
−
−
−
4.6
1
−
−
−
V
Ich(PLL2)
charge current for external
capacitor during soft start
VHPLL2 < 3.7 V
VHPLL2 < 3.7 V
µA
µA
Idch(PLL2)
discharge current for external
capacitor during soft down
−1
1999 Oct 25
18
NXP [ NXP ]
