Philips Semiconductors
Preliminary specification
PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC
comb filter, VBI-data slicer and high performance scaler
SYMBOL
TEST4
TEST5
XTRI
PIN
78
79
80
TYPE
O
I
I
DESCRIPTION
SAA7114H
do not connect; reserved for future extensions and for testing: scan output
do not connect; reserved for future extensions and for testing: scan input
X-port output control signal, affects all X-port pins (XPD7 to XPD0, XRH, XRV,
XDQ and XCLK), enable and active polarity is under software control (bits XPE
in subaddress 83H)
expansion port data
expansion port data
internal digital core supply voltage 5 (+3.3 V)
expansion port data
internal digital core supply ground 3
expansion port data
expansion port data
vertical reference I/O expansion port
horizontal reference I/O expansion port
internal digital core supply voltage 6 (+3.3 V)
clock I/O expansion port
data qualifier I/O expansion port
task flag or ready signal from scaler, controlled by XRQT
test reset input (active LOW), for boundary scan test (with internal pull-up);
notes 5 and 6
test clock for boundary scan test; note 1
test mode select input for boundary scan test or scan test; note 1
external digital pad supply ground 4
XPD7
XPD6
V
DDD(ICO5)
XPD5 to XPD2
V
SSD(ICO3)
XPD1
XPD0
XRV
XRH
V
DDD(ICO6)
XCLK
XDQ
XRDY
TRST
TCK
TMS
V
SSD(EP4)
Notes
81
82
83
84 to 87
88
89
90
91
92
93
94
95
96
97
98
99
100
I/O
I/O
P
I/O
P
I/O
I/O
I/O
I/O
P
I/O
I/O
O
I
I
I
P
1. In accordance with the
“IEEE1149.1”
standard the pads TDI, TMS, TCK and TRST are input pads with an internal
pull-up transistor and TDO is a 3-state output pad.
2. Pin strapping is done by connecting the pin to supply via a 3.3 kΩ resistor. During the power-up reset sequence the
corresponding pins are switched to input mode to read the strapping level. For the default setting no strapping
resistor is necessary (internal pull-down).
3. Pin RTCO: operates as I
2
C-bus slave address pin; RTCO = 0 slave address 42H/43H (default); RTCO = 1 slave
address 40H/41H.
4. Pin ALRCLK: 0 = 24.576 MHz crystal (default); 1 = 32.110 MHz crystal.
5. For board design without boundary scan implementation connect the TRST pin to ground.
6. This pin provides easy initialization of the Boundary Scan Test (BST) circuit. TRST can be used to force the Test
Access Port (TAP) controller to the TEST_LOGIC_RESET state (normal operation) at once.
2000 Mar 15
9
PHILIPS [ NXP SEMICONDUCTORS ]
