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AI12
AI21
AI22
AI23
16
14
12
10
22
19
13
21
ANALOG
DUAL
ADC
AI24
AOUT
AI1D
AI2D
AGND
DIGITAL
DECODER
WITH
ADAPTIVE
COMB
FILTER
EVENT CONTROLLER
IMAGE PORT PIN MAPPING
2000 Mar 15
LLC
RES
CE
XTOUT
XTALI
XTALO
AI11
30
27
4
7
6
20
18
6
Philips Semiconductors
PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC
comb filter, VBI-data slicer and high performance scaler
BLOCK DIAGRAM
LLC2
RTS0
(1)
XCLK
XPD [7:0]
XRH
81, 82,
84 to 87
89, 90
92
XRV
XTRI
HPD [7:0]
80
64 to 67,
69 to 72
I/O CONTROL
SDA
32
SCL
31
TEST5
TEST3
TEST1
TEST0
73
44
RTCO
29
36
RTS1
34
35
94
XDQ
95
XRDY
91
96
TEST4
79
78
TEST2
77
74
28
REAL-TIME OUTPUT
EXPANSION PORT PIN MAPPING
I
2
C-BUS
X PORT I/O FORMATTING
CLOCK GENERATION
AND
POWER-ON CONTROL
chrominance of 16-bit input
SAA7114H
PROGRAMMING
REGISTER
ARRAY
A/B
REGISTER
MUX
54 to 57,
59 to 62
46
53
52
48
49
IPD [7:0]
IDQ
IGPH
IGPV
IGP0
IGP1
FIR-PREFILTER
HORIZONTAL
LINE
VERTICAL
PRESCALER
FINE
FIFO
SCALING
AND
(PHASE)
BUFFER
SCALER BCS
SCALING
VIDEO
FIFO
6
BOUNDARY
SCAN
TEST
AUDIO
CLOCK
GENERATION
GENERAL PURPOSE
VBI-DATA SLICER
TEXT
FIFO
32
to
8(16)
MUX
45
ICLK
42
VIDEO/TEXT
ARBITER
47
ITRDY
ITRI
97 98 99 3
TCK
TRST
TDI
2
37
40
39
41
8
5
33, 43,
58, 68,
83, 93
1, 25,
51, 75
23, 17,
11
38, 63,
88
26, 50,
76, 100
24,
15, 9
MHB528
AMCLK
TMS
TDO
ASCLK VDD(XTAL) VDDD(ICO1)
to
ALRCLK AMXCLK
VDDD(ICO6)
(1)
VDDA0
to
VDDA2
VSSD(EP1)
to
VSSD(EP4)
VSSD(ICO1)
to
VSSD(ICO3)
VSSA0
to
VSSA2
VSS(XTAL)
VDDD(EP1)
to
VDDD(EP4)
Preliminary specification
SAA7114H
(1) The pins RTCO and ALRCLK are used for configuration of the I
2
C-bus interface
and the definition of the crystal oscillator frequency at RESET (pin strapping).
Fig.1 Block diagram.
PHILIPS [ NXP SEMICONDUCTORS ]
