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SAA7114H 参数 Datasheet PDF下载

SAA7114H图片预览
型号: SAA7114H
PDF下载: 下载PDF文件 查看货源
内容描述: PAL / NTSC / SECAM视频解码器具有自适应PAL / NTSC梳状滤波器, VBI数据限幅器和高性能的定标器 [PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC combfilter, VBI-data slicer and high performance scaler]
分类和应用: 解码器转换器色度信号转换器消费电路商用集成电路
文件页数/大小: 140 页 / 549 K
品牌: NXP [ NXP ]
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Philips Semiconductors  
Preliminary specification  
PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC  
comb filter, VBI-data slicer and high performance scaler  
SAA7114H  
9.4  
Video expansion port (X-port)  
As output, these are direct copies of the decoder signals.  
The expansion port is intended for transporting video  
streams image data from other digital video circuits like  
MPEG encoder/decoder and video phone codec, to the  
image port (I-port).  
The data transfers through the expansion port represent a  
single D1 port, with half duplex mode. The SAV and EAV  
codes may be inserted optionally for data input (controlled  
by bit XCODE[92H[3]]). The input/output direction is  
switched for complete fields, only.  
The expansion port consists of two groups of signals/pins:  
8-bit data, I/O, regularly components video  
YUV 4 : 2 : 2, i.e. CB-Y-CR-Y, byte serial, exceptionally  
raw video samples (e.g. ADC test). In input mode the  
data bus can be extended to 16-bit by the pins  
HPD7 to HPD0.  
Clock, synchronization and auxiliary signals,  
accompanying the data stream, I/O.  
Table 26 Signals dedicated to the expansion port  
SYMBOL  
PIN  
I/O  
DESCRIPTION  
BIT  
XPD7 to  
XPD0  
81, 82, I/O X-port data: in output mode controlled by decoder  
OFTS[2:0]13H[2:0];  
91H[7:0] and C1H[7:0]  
84 to 87,  
section, data format see Table 27; in input mode  
YUV 4 : 2 : 2 serial input data or luminance part of  
a 16-bit YUV 4 : 2 : 2 input  
89 and 90  
XCLK  
94  
I/O clock at expansion port: if output, then copy of LLC; XCKS[92H[0]]  
as input normally a double pixel clock of up to  
32 MHz or a gated clock (clock gated with a  
qualifier)  
XDQ  
95  
96  
I/O data valid flag of the expansion port input (qualifier):  
if output, then decoder (HREF and VGATE) gate  
(see Fig.23)  
XRDY  
O
data request flag = ready to receive, to work with  
optional buffer in external device, to prevent internal  
buffer overflow;  
XRQT[83H[2]]  
second function: input related task flag A/B  
XRH  
XRV  
XTRI  
92  
91  
80  
I/O horizontal reference signal for the X-port: as output: XRHS[13H[6]], XFDH[92H[6]] and  
HREF or HS from the decoder (see Fig.23); as  
input: a reference edge for horizontal input timing  
and a polarity for input field ID detection can be  
defined  
XDH[92H[2]]  
I/O vertical reference signal for the X-port: as output:  
V123 or field ID from the decoder,  
XRVS[1:0]13H[5:4], XFDV[92H[7]]  
and XDV[1:0]92H[5:4]  
see Figs 21 and 22; as input: a reference edge for  
vertical input timing and for input field ID detection  
can be defined  
I
port control: switches X-port input 3-state  
XPE[1:0]83H[1:0]  
2000 Mar 15  
62  
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