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SAA7114H 参数 Datasheet PDF下载

SAA7114H图片预览
型号: SAA7114H
PDF下载: 下载PDF文件 查看货源
内容描述: PAL / NTSC / SECAM视频解码器具有自适应PAL / NTSC梳状滤波器, VBI数据限幅器和高性能的定标器 [PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC combfilter, VBI-data slicer and high performance scaler]
分类和应用: 解码器转换器色度信号转换器消费电路商用集成电路
文件页数/大小: 140 页 / 549 K
品牌: NXP [ NXP ]
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Philips Semiconductors  
Preliminary specification  
PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC  
comb filter, VBI-data slicer and high performance scaler  
SAA7114H  
15.5.6 SUBADDRESSES 91H TO 93H  
Table 99 X-port formats and configuration; register set A (91H[2:0]) and B (C1H[2:0])  
CONTROL BITS D2 TO D0(1)  
SCALER INPUT FORMAT AND CONFIGURATION FORMAT  
CONTROL  
FSC2(2)  
FSC1(2)  
FSC0  
Input is YUV 4 : 2 : 2 like sampling scheme  
Input is YUV 4 : 1 : 1 like sampling scheme  
Chroma is provided every line, default  
Chroma is provided every 2nd line  
X
X
0
0
1
1
X
X
0
1
0
1
0
1
X
X
X
X
Chroma is provided every 3rd line  
Chroma is provided every 4th line  
Notes  
1. X = don’t care.  
2. FSC2 and FSC1 only to be used, if X-port input source don’t provide chroma information for every input line. X-port  
input stream must contain dummy chroma bytes.  
Table 100 X-port formats and configuration; register set A (91H[7:3]) and B (C1H[7:3])  
X = don’t care.  
CONTROL BITS D7 TO D3  
SCALER INPUT FORMAT AND CONFIGURATION SOURCE  
SELECTION  
CONLV  
HLDFV SCSRC1 SCSRC0 SCRQE  
Only if XRQT[83H[2]] = 1: scaler input source reacts on  
SAA7114H request  
X
X
X
X
0
Scaler input source is a continuous data stream, which cannot  
be interrupted (must be logic 1, if SAA7114H decoder part is  
source of scaler or XRQT[83H[2]] = 0)  
X
X
X
X
X
1
Scaler input source is data from decoder, data type is  
provided according to Table 14  
X
0
0
X
Scaler input source is YUV data from X-port  
X
X
X
X
0
1
1
0
X
X
Scaler input source is raw digital CVBS from selected analog  
channel, for backward compatibility only, further use is not  
recommended  
Scaler input source is raw digital CVBS (or 16-bit Y + UV, if no  
16-bit output are active) from X-port  
X
X
X
0
X
0
1
X
X
X
X
1
X
X
X
X
X
X
X
X
X
SAV/EAV code bits D6 and D5 (F and V) may change  
between SAV and EAV  
SAV/EAV code bits D6 and D5 (F and V) are synchronized to  
scalers output line start  
1
SAV/EAV code bit D5 (V) and V-gate on pin IGPV as  
generated by the internal processing, see Fig.36  
X
X
SAV/EAV code bit D5 (V) and V-gate are inverted  
1
2000 Mar 15  
118  
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