Philips Semiconductors
Preliminary specification
PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC
comb filter, VBI-data slicer and high performance scaler
SAA7114H
15.4.9 SUBADDRESS 60H (READ-ONLY REGISTER)
Table 78 Slicer status byte 0; 60H[6:2]
BIT
DESCRIPTION
SYMBOL VALUE
FUNCTION
D6 framing code valid
D5 framing code valid
D4 VPS valid
FC8V
FC7V
VPSV
PPV
0
1
0
1
0
1
0
1
0
1
no framing code (0 error) in the last frame detected
framing code with 0 error detected
no framing code (1 error) in the last frame detected
framing code with 1 error detected
no VPS in the last frame
VPS detected
D3 PALplus valid
no PALplus in the last frame
PALplus detected
D2 close caption valid
CCV
no closed caption in the last frame
closed caption detected
15.4.10 SUBADDRESSES 61H AND 62H (READ-ONLY REGISTERS)
Table 79 Slicer status byte 1; 61H[5:0] and slicer status byte 2; 62H[7:0]
SUBADDRESS
BIT
SYMBOL
DESCRIPTION
61H
D5
F21_N
LN[8:4]
LN[3:0]
DT[3:0]
field ID as seen by the VBI slicer; for field 1: D5 = 0
line number
D[4:0]
D[7:4]
D[3:0]
62H
data type; according to Table 14
15.5 Programming register interfaces and scaler part
15.5.1 SUBADDRESS 80H
Table 80 Global control 1; global set 80H[3:0]
X = don’t care.
CONTROL BITS D3 TO D0
I-PORT AND SCALER BACK-END CLOCK SELECTION
ICKS3 ICKS2 ICKS1 ICKS0
ICLK output and back-end clock is line-locked clock LLC from decoder
ICLK output and back-end clock is XCLK from X-port
ICLK output is LLC and back-end clock is LLC2 clock
Back-end clock is the ICLK input
X
X
X
X
X
X
0
X
X
X(1)
0
0
0
1
1
0
X
1
1
IDQ pin carries the data qualifier
0
X
X
X
X
X
X
X
X
IDQ pin carries a gated back-end clock (IDQ AND CLK)
IDQ generation only for valid data
1
X
IDQ qualifies valid data inside the scaling region and all data outside the scaling
region
1
X
Note
1. Although the ICLKO I/O is independent of ICKS2 and ICKS3, this selection can only be used if ICKS2 = 1.
2000 Mar 15
110
NXP [ NXP ]
