Philips Semiconductors
Product specification
Video Input Processor (VIP)
SAA7111
PINS
SYMBOL
PLCC68
VPO (9 to 0)
53 to 62
QFP64
42 to 51
O
Digital VPO-bus output signal; lower bits of the 16-bit YUV-bus or the
16-bit RGB-bus output signal. The output data rate, the format and
multiplexing schema of the VPO-bus are controlled via I
2
C-bits
OFTS0 and OFTS1. With I
2
C-bit VIPB = 1 the digitized input signals
(AD1 [1 and 0] and AD2 [7 to 0]) are connected to these outputs.
Fast enable input signal (active LOW); this signal is used to control
fast switching on the digital YUV-bus. A HIGH at this input forces the
IC to set its Y and UV outputs to the high impedance state; note 4.
General purpose switch output; the state of this signal is set via
I
2
C-bus control and the levels are TTL compatible.
Second output terminal of crystal oscillator; not connected if external
clock signal is used.
Input terminal for 24.576 MHz crystal oscillator or connection of
external oscillator with CMOS compatible square wave clock signal.
Digital ground for positive supply voltage 1.
Positive digital supply voltage 1 (+5 V).
I/O
DESCRIPTION
FEI
63
52
I
GPSW
XTAL
XTALI
V
SS1
V
DD1
Notes
64
65
66
67
68
53
54
55
56
57
O
O
I
GND
P
1. For board design without boundary scan implementation (pin compatibility with the SAA7110) connect the TRST pin
to ground.
2. This pin provides easy initialization of BST circuit. TRST can be used to force the TAP (Test Access Port) controller
to the Test-Logic-Reset state (normal operation) at once.
3. In accordance with the
IEEE1149.1
standard the pads TCK, TDI, TMS and TRST are input pads with an internal
pull-up transistor and TDO a 3-state output pad.
4. All pin names that carry an ‘overscore’ have been renamed due to Philips pin name conventions. In previous data
sheet versions these pins were marked by the suffix ‘N’, e.g. TRST = TRSTN.
1998 May 15
8
PHILIPS [ NXP SEMICONDUCTORS ]
