Philips Semiconductors
Product specification
Video Input Processor (VIP)
6
BLOCK DIAGRAM
SAA7111
handbook, full pagewidth
BYPASS
AOUT
AI11
AI12
23 (14)
21 (12)
19 (10)
ANALOG
PROCESSING
AND
ANALOG-TO-
DIGITAL
CONVERSION
AD2
n.c.
VSS
7,8,9 (64)
22 (13)
CON
Y
I C-BUS
CONTROL
I C-BUS
INTERFACE
2
2
C/CVBS
AI21
AI22
17 (8)
15 (6)
CHROMINANCE
CIRCUIT
AND
BRIGHTNESS
CONTRAST
SATURATION
CONTROL
UV
Y
YUV-to-RGB
CONVERSION
AND
OUTPUT
FORMATTER
45 to 50
53 to 62
(34 to 39)
(42 to 51)
(52) 63
(31) 42
VPO
(0 : 15)
FEI
HREF
AD1
(53) 64
(61) 4
(62) 5
(63) 6
n.c.
10,36,
37
ANALOG
PROCESSING
CONTROL
GPSW
IICSA
SDA
SCL
LUMINANCE
CIRCUIT
Y/CVBS
Y
VSSA1-2
V
DDA1-2
18,14 (9,5)
20,16 (11,7)
SAA7111
CLOCKS
TDI
TCK
TMS
TRST
TDO
12 (3)
2 (59)
13 (4)
1 (58)
11 (2)
TEST
CONTROL
BLOCK
FOR
BOUNDARY
SCAN TEST
AND
SCAN TEST
(56,40,32,26,19)
67,51,43,35,28
(54) 65
CLOCK
GENERATION
CIRCUIT
POWER-ON
CONTROL
(55) 66
(21) 30
(22) 31
LFCO
(20) 29
(23) 32
XTAL
XTALI
LLC2
CREF
LLC
RES
SYNCHRONIZATION
CIRCUIT
(57,41,33,25,18)
68,52,44,34,27
VDD1-5
(30)
41
VS
HS
(27)
38
(17)
26
(29)
40
(28)
39
(60)
3
V
(15)
24
V
(16)
25
(24)
33
MGC653
VSS1-5
VREF RTS0 RTS1 RTCO
DDA0
SSA0
CE
The pin numbers given in parenthesis refer to the 64-pin package.
Fig.1 Block diagram.
1998 May 15
5
PHILIPS [ NXP SEMICONDUCTORS ]
