Philips Semiconductors
Product specification
1GHz low-voltage Fractional-N synthesizer
SA7025
Table 3. PR Modulus
In “speed-up mode” the current in output PHI is:
PR
Modulus Prescaler
Bit Capacity
NM1
12
NM2
NM3
IPHI_S + IPHI ) IPHI_comp
01
10
2
3
8
4
–
4
where:
12
IRNCN
32
|IPHI| +
CL)1) CK
ǒ Ǔ(2
When the serial input A word is loaded, the output circuits are in the
“speed-up mode” as long as the STROBE is H, else the “normal
mode” is active. In the “normal mode” the current output PHP is:
IRF FRD
128
CL)1) CK
ǒ Ǔ(2
|IPHI_comp| +
IPHP_N + IPHP ) IPHP_comp
Figure 9 shows that for proper fractional compensation, the area of
the fractional compensation current pulse must be equal to the area
of the charge pump ripple output. This means that the current
setting on the input RN, RF is approximately:
where:
CN @ IRN
|IPHP| +
:charge pump current
IRF :fractional comp.
32
(Q @ fVCO
)
IRN
+
|IPHP_comp| + FRD @
current
128
IRF
(3 @ CN @ FINR
)
The current in PHI is zero in “normal mode”.
where:
Q
=
fractional-N modulus
In “speed-up mode” the current in output PHP is:
f
= f
=
× N,
INM
input frequency of the prescaler
input frequency of the reference divider
VCO
F
INR
IPHP_S + IPHP ) IPHP_comp
PHI pump is meant for switching only. Current and compensation
are not as accurate as PHP.
| + ǒCN @ IRNǓ(2
|IPHP
CL)1 ) 1)
32
FRD @ IRF
(2CL)1 ) 1)
Ǔ
ǒ
|IPHP_comp| +
128
L
“1”
R
D
C
Q
REFERENCE
REF_IN
V
DDA
DIVIDER
R
R
P
P-TYPE
CHARGE PUMP
PH
“1”
X
D
C
AUX/MAIN
DIVIDER
N-TYPE
Q
CHARGE PUMP
N
V
SSA
REF_IN
L
R
X
P
N
I
P
H
SR00607
Figure 8. Phase Detector Structure with Timing
13
1996 Aug 6
NXP [ NXP ]
