Philips Semiconductors
Product specification
I
2
C-bus controller
PCF8584
handbook, full pagewidth
START
A0 = LOW
send byte 'slave address' to S0
A0 = HIGH
read byte from S1 status register
Load 'Slave Address' into S0 register:
'Slave Address' = 7 bits
+
R/W = 1.
yes
is bus busy?
(BB = 0?)
no
A0 = HIGH
Is the I
2
C-bus busy?
send byte C5H to S1 control register
PCF8584 generates 'START' condition,
sends out slave address
+
RD to I
2
C-bus and
generates 9th clock pulse for slave ACK.
n = 0 (data byte counter)
m = number of data bytes
to be read
A0 = HIGH
read byte from S1 status register
Set-up software counters.
A0 = HIGH
send byte 40H to control register S1
A0 = LOW
read data byte from S0 register
(1)
Set ACK bit S1 to 0 in
preparation for negative
acknowledgement.
This command simultaneously
receives the final data byte
from the I
2
C-bus and loads
it into register S0.
Neg. ACK is also sent.
no
PIN = 0?
yes
A0 = HIGH
read byte from S1 status register
slave ACK?
(LRB = 0?)
n=n
+
1
yes
no
(an error
has occured)
no
PIN = 0?
yes
A0 = HIGH
send byte C3H to S1
n = m
−
1?
A0 = LOW
read final data byte from S0 register
A0 = LOW
read data byte from S0 register
(1)
END
PCF8584 generates
'STOP' condition.
PCF8584 goes into
slave receiver mode.
This command transfers
the final data byte from
the data buffer to accumulator.
Because the STOP condition
was previously executed, no
I
2
C-bus activity takes place.
MGL009
(1) The first read of the S0 register is a ‘dummy read’ of the slave address which should be discarded. The first read of the S0 register simultaneously
reads the current value of S0 and then transfers the first valid data byte from the I
2
C-bus to S0.
Fig.7 PCF8584 master receiver mode.
1997 Oct 21
17
PHILIPS [ NXP SEMICONDUCTORS ]
