PCF8566
NXP Semiconductors
Universal LCD driver for low multiplex rates
Single plane wiring of packaged PCF8566s is illustrated in Figure 28.
SDA
SCL
SYNC
CLK
V
DD
V
SS
V
LCD
1
2
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
1
2
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
SDA
SCL
S23
S22
S21
S20
S19
S18
S17
S16
S15
S14
S13
S12
S11
S10
S9
S47
S46
S45
S44
S43
S42
S41
S40
S39
S38
S37
S36
S35
S34
S33
S32
S31
S30
S29
S28
3
3
SYNC
CLK
4
4
V
5
5
DD
6
6
OSC
A0
7
7
8
8
A1
9
9
A2
10
11
12
13
14
15
16
17
18
19
20
10
11
12
13
14
15
16
17
18
19
20
SA0
V
SS
V
LCD
BP0
BP2
BP1
BP3
S0
BP0
BP2
BP1
BP3
S24
S25
S26
S27
PCF8566
PCF8566
open-circuit
S8
S7
S1
S6
S2
S5
S3
S4
S0
S23
S24
S47
SEGMENTS
mgg386
BACKPLANES
Fig 28. Single plane wiring of packaged PCF8566s
PCF8566_7
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 07 — 25 February 2009
36 of 48
NXP [ NXP ]
