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drive mode
LCD segments
a
LCD backplanes
display RAM filling order
transmitted display byte
S
n+2
n
n
1
n
2
n
3
n
4
n
5
n
6
n 7
b
BP0
f
S
S
n+3
n+1
MSB
LSB
0
1
2
3
c
x
x
x
b
x
x
x
a
x
x
x
f
g
x
x
x
e
x
x
x
d
x
x
x
DP
bit/
BP
g
S
n+4
S
n
x
x
x
x
x
x
c
b
a
f
g
e
d
DP
static
e
S
S
S
n+5
n+7
DP
c
d
n+6
BP0
S
n
a
n
n
n
n
1
1
1
n
2
n 3
b
b
b
1:2
f
S
n+1
MSB
LSB
DP
0
1
2
3
a
b
x
x
f
e
c
x
x
d
bit/
BP
g
g
x
x
DP
x
x
a
b
f
g
e c d
BP1
multiplex
S
S
e
n+2
n+3
c
c
c
d
d
d
DP
BP0
BP1
S
n+1
a
n
n 2
S
S
n
f
1:3
n+2
MSB
LSB
e
0
1
2
3
b
DP
c
a
d
g
x
f
bit/
BP
g
e
x
x
BP2
multiplex
b
DP
c
a
d
g
f
e
x
DP
S
n
a
n
BP2
BP3
BP0
BP1
f
1:4
0
1
2
3
a
c
f
bit/
BP
MSB
LSB
d
g
e
g
d
multiplex
b
DP
e
a
c
b
DP
f
e
g
S
n+1
DP
mgl751
x = data bit unchanged
Fig 11. Relationship between LCD layout, drive mode, display RAM filling order and display data transmitted over the I2C-bus
NXP [ NXP ]
