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P87C552SBAA 参数 Datasheet PDF下载

P87C552SBAA图片预览
型号: P87C552SBAA
PDF下载: 下载PDF文件 查看货源
内容描述: 80C51的8位微控制器8K / 256 OTP , 8通道10位A / D , I2C , PWM ,捕获/比较,高I / O,低电压2.7V.5.5V ,低功耗 [80C51 8-bit microcontroller 8K/256 OTP, 8 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, low voltage 2.7V.5.5V, low power]
分类和应用: 微控制器和处理器外围集成电路可编程只读存储器时钟
文件页数/大小: 74 页 / 370 K
品牌: PHILIPS [ NXP SEMICONDUCTORS ]
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Philips Semiconductors
Preliminary specification
80C51 8-bit microcontroller
8K/256 OTP, 8 channel 10 bit A/D, I
2
C, PWM,
capture/compare, high I/O, low voltage (2.7V–5.5V), low power
P87C552
PIN DESCRIPTION
(Continued)
PIN NO.
MNEMONIC
P4.0-P4.7
PLCC
7-14
7-12
13, 14
QFP
80, 1-2
4-8
80, 1-2
4-6
7, 8
TYPE
I/O
O
O
NAME AND FUNCTION
Port 4:
8-bit programmable I/O port. Alternate functions include:
CMSR0-CMSR5 (P4.0-P4.5):
Timer T2 compare and set/reset outputs on a match with
timer T2.
CMT0, CMT1 (P4.6, P4.7):
Timer T2 compare and toggle outputs on a match with timer T2.
Port 4 has four modes selected on a per bit basis by writing to the P4M1 and P4M2
registers as follows:
P4M1.x
0
0
1
1
P5.0-P5.7
RST
XTAL1
68-62,
1
15
35
71-64
9
32
I
I/O
I
P4M2.x
0
1
0
1
Mode Description
Pseudo-bidirectional (standard c51 configuration; default)
Push-Pull
High impedance
Open drain
Port 5:
8-bit input port.
ADC0-ADC7 (P5.0-P5.7):
Alternate function: Eight input channels to the ADC.
Reset:
Input to reset the 87C552. It also provides a reset pulse as output when timer T3
overflows.
Crystal Input 1:
Input to the inverting amplifier that forms the oscillator, and input to the
internal clock generator. Receives the external clock signal when an external oscillator is
used.
Crystal Input 2:
Output of the inverting amplifier that forms the oscillator. Left open-circuit
when an external clock is used.
Digital ground.
Program Store Enable:
Active-low read strobe to external program memory.
Address Latch Enable:
Latches the low byte of the address during accesses to external
memory. It is activated every six oscillator periods. During an external data memory
access, one ALE pulse is skipped. ALE can drive up to eight LS TTL inputs and handles
CMOS inputs without an external pull-up. This pin is also the program pulse input (PROG)
during EPROM programming.
External Access:
When EA is held at TTL level high, the CPU executes out of the internal
program ROM provided the program counter is less than 8,192. When EA is held at TTL
low level, the CPU executes out of external program memory. EA is not allowed to float.
This pin also receives the 12.75V programming supply voltage (V
PP
) during EPROM
programming.
Analog to Digital Conversion Reference Resistor:
Low-end.
Analog to Digital Conversion Reference Resistor:
High-end.
Analog Ground
XTAL2
V
SS
PSEN
ALE/PROG
34
36, 37
47
48
31
34-36
48
49
O
I
O
O
EA/V
PP
49
50
I
AV
REF–
AV
REF+
AV
SS
58
59
60
59
60
61
I
I
I
AV
DD
61
63
I
Analog Power Supply
NOTE:
1. To avoid “latch-up” effect at power-on, the voltage on any pin at any time must not be higher or lower than V
DD
+ 0.5V or V
SS
– 0.5V,
respectively.
1999 Mar 30
6