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ISP1581BD,518 参数 Datasheet PDF下载

ISP1581BD,518图片预览
型号: ISP1581BD,518
PDF下载: 下载PDF文件 查看货源
内容描述: [IC UNIVERSAL SERIAL BUS CONTROLLER, PQFP64, 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64, Bus Controller]
分类和应用: 时钟数据传输外围集成电路
文件页数/大小: 80 页 / 389 K
品牌: NXP [ NXP ]
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ISP1581  
Hi-Speed USB peripheral controller  
Philips Semiconductors  
Table 57: Interrupt register: bit allocation  
Bit  
31  
30  
29  
28  
27  
26  
25  
24  
Symbol  
Reset  
reserved  
EP7TX  
EP7RX  
-
-
-
-
-
-
-
0
0
Bus reset  
Access  
Bit  
-
-
R/W  
22  
-
-
R/W  
19  
-
R/W  
18  
0
0
R/W  
R/W  
21  
R/W  
R/W  
R/W  
23  
20  
17  
16  
Symbol  
Reset  
EP6TX  
EP6RX  
0
EP5TX  
EP5RX  
EP4TX  
0
EP4RX  
0
EP3TX  
EP3RX  
0
0
0
0
0
Bus reset  
Access  
Bit  
0
0
0
0
0
0
0
0
R/W  
R/W  
14  
R/W  
R/W  
R/W  
11  
R/W  
10  
R/W  
R/W  
15  
13  
12  
9
8
Symbol  
Reset  
EP2TX  
EP2RX  
0
EP1TX  
EP1RX  
EP0TX  
0
EP0RX  
0
reserved  
EP0SETUP  
0
0
0
-
-
0
Bus reset  
Access  
Bit  
0
0
0
0
0
0
0
R/W  
R/W  
R/W  
6
R/W  
R/W  
R/W  
3
R/W  
2
R/W  
1
7
5
4
0
Symbol  
Reset  
reserved  
DMA  
0
HS_STAT  
RESUME  
SUSP  
0
PSOF  
0
SOF  
0
BRESET  
0
-
-
0
0
0
0
Bus reset  
Access  
0
0
0
0
unchanged  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
Table 58: Interrupt register: bit description  
Bit  
31 to 26  
25  
Symbol  
reserved  
EP7TX  
EP7RX  
EP6TX  
EP6RX  
EP5TX  
EP5RX  
EP4TX  
EP4RX  
EP3TX  
EP3RX  
EP2TX  
EP2RX  
EP1TX  
EP1RX  
EP0TX  
Description  
reserved; must write logic 0  
A logic 1 indicates the Endpoint 7 TX buffer as interrupt source.  
A logic 1 indicates the Endpoint 7 RX buffer as interrupt source.  
A logic 1 indicates the Endpoint 6 TX buffer as interrupt source.  
A logic 1 indicates the Endpoint 6 RX buffer as interrupt source.  
A logic 1 indicates the Endpoint 5 TX buffer as interrupt source.  
A logic 1 indicates the Endpoint 5 RX buffer as interrupt source.  
A logic 1 indicates the Endpoint 4 TX buffer as interrupt source.  
A logic 1 indicates the Endpoint 4 RX buffer as interrupt source.  
A logic 1 indicates the Endpoint 3 TX buffer as interrupt source.  
A logic 1 indicates the Endpoint 3 RX buffer as interrupt source.  
A logic 1 indicates the Endpoint 2 TX buffer as interrupt source.  
A logic 1 indicates the Endpoint 2 RX buffer as interrupt source.  
A logic 1 indicates the Endpoint 1 TX buffer as interrupt source.  
A logic 1 indicates the Endpoint 1 RX buffer as interrupt source.  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
A logic 1 indicates the Endpoint 0 data TX buffer as interrupt  
source.  
10  
EP0RX  
A logic 1 indicates the Endpoint 0 data RX buffer as interrupt  
source.  
9397 750 13462  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 06 — 23 December 2004  
43 of 79  
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