ISP1581
Hi-Speed USB peripheral controller
Philips Semiconductors
9.1 Register access
Register access depends on the bus width used:
• 8-bit bus: multi-byte registers are accessed lower byte (LSByte) first.
• 16-bit bus: for single-byte registers the upper byte (MSByte) must be ignored.
Endpoint specific registers are indexed via the Endpoint Index register. The target
endpoint must be selected first, before accessing the following registers:
• Buffer Length
• Control Function
• Data Port
• Endpoint MaxPacketSize
• Endpoint Type
• Short Packet.
Remark: All reserved bits are not implemented. The bus and bus reset values are not
defined. Therefore, writing to these reserved bits will have no effect.
9.2 Initialization registers
9.2.1 Address register (address: 00H)
This register is used to set the USB assigned address and enable the USB device.
Table 5 shows the Address register bit allocation.
The DEVEN and DEVADDR bits will be cleared whenever a bus reset, a power-on
reset or a soft reset occurs.
In response to the standard USB request SET_ADDRESS, the firmware must write
the (enabled) device address to the Address register, followed by sending an empty
packet to the host. The new device address is activated when the host acknowledges
the empty packet.
Table 5:
Bit
Address register: bit allocation
7
6
5
4
3
DEVADDR[6:0]
00H
2
1
0
Symbol
Reset
DEVEN
0
0
Bus reset
Access
00H
R/W
R/W
Table 6:
Bit
Endpoint Configuration register: bit description
Symbol
Description
7
DEVEN
A logic 1 enables the device.
6 to 0
DEVADDR[6:0]
This field specifies the USB device address.
9397 750 13462
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 06 — 23 December 2004
18 of 79
NXP [ NXP ]
