ISP1581
Hi-Speed USB peripheral controller
Philips Semiconductors
Remark: The buffer can be validated or cleared automatically by using the Buffer
Length register (see Table 21).
Table 19: Data Port register: bit allocation
Bit
15
14
13
12
11
10
9
1
8
0
Symbol
Reset
DATAPORT[15:8]
00H
00H
R/W
Bus reset
Access
Bit
7
6
5
4
3
2
Symbol
Reset
DATAPORT[7:0]
00H
00H
R/W
Bus reset
Access
Table 20: Data Port register: bit description
Bit
Symbol
Description
15 to 8
7 to 0
DATAPORT[15:8]
DATAPORT[7:0]
data (upper byte); not used in 8-bit bus mode
data (lower byte)
9.3.4 Buffer Length register (address: 1CH)
This 2-byte register determines the current packet size (DATACOUNT) of the indexed
endpoint FIFO. The bit allocation is given in Table 21.
The Buffer Length register is automatically loaded with the FIFO size, when the
Endpoint MaxPacketSize register is written (see Table 22). A smaller value can be
written when required. After a bus reset the Buffer Length register is made zero.
IN endpoint: When data transfer is performed in multiples of MaxPacketSize, the
Buffer Length register is not significant. This register is useful only when transferring
data that is not a multiple of MaxPacketSize. The following two examples
demonstrate the significance of the Buffer Length register.
Example 1: Consider that the transfer size is 512 bytes and the MaxPacketSize is
programmed as 64 bytes, the Buffer Length register need not be filled. This is
because the transfer size is a multiple of MaxPacketSize, and the MaxPacketSize
packets will be automatically validated because the last packet is also of
MaxPacketSize.
Example 2: Consider that the transfer size is 510 bytes and the MaxPacketSize is
programmed as 64 bytes, the Buffer Length register should be filled with 62 bytes just
before the MCU writes the last packet of 62 bytes. This ensures that the last packet,
which is a short packet of 62 bytes, is automatically validated.
This is only applicable to the PIO mode access.
OUT endpoint: The DATACOUNT value is automatically initialized to the number of
data bytes sent by the host on each ACK.
Remark: When using a 16-bit microprocessor bus, the last byte of an odd-sized
packet is output as the lower byte (LSByte).
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© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 06 — 23 December 2004
25 of 79
NXP [ NXP ]
