ISP1362
Single-chip USB OTG controller
Philips Semiconductors
Table 27: OtgInterrupt register: bit description…continued
Bit
Symbol
Description
6
OTG_
SUSPND
This bit is set whenever the OTG port goes into the suspend state
(bus idle for > 3 ms). Write logic 1 to clear this bit. Writing logic 0
has no effect.
0 — no event
1 — suspend (bus idle for > 3 ms)
5
4
3
2
1
0
RMT_
CONN_C
This bit is set whenever the RMT_CONN bit of the OtgStatus
register changes. Write logic 1 to clear this bit. Writing logic 0 has
no effect.
0 — no event
1 — RMT_CONN bit has changed
B_SESS_
VLD_C
This bit is set whenever the B_SESS_VLD bit of the OtgStatus
register changes. Write logic 1 to clear this bit. Writing logic 0 has
no effect.
0 — no event
1 — bit B_SESS_VLD has changed
A_SESS_
VLD_C
This bit is set whenever the A_SESS_VLD bit of the OtgStatus
register changes. Write logic 1 to clear this bit. Writing logic 0 has
no effect.
0 — no event
1 — bit A_SESS_VLD has changed
B_SESS_
END_C
This bit is set whenever the B_SESS_END bit of the OtgStatus
register changes. Write logic 1 to clear this bit. Writing logic 0 has
no effect.
0 — no event
1 — bit B_SESS_END has changed
A_VBUS_
VLD_C
This bit is set whenever the A_VBUS_VLD bit of the OtgStatus
register changes. Write logic 1 to clear this bit. Writing logic 0 has
no effect.
0 — no event
1 — bit A_VBUS_VLD has changed
ID_REG_C This bit is set whenever the ID_REG bit of the OtgStatus register
changes. This is an indication that the mini-A plug is inserted or
removed (that is, the ID pin is shorted to ground or pulled HIGH).
Write logic 1 to clear this bit. Writing logic 0 has no effect.
0 — no event
1 — ID_REG bit has changed
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© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 06 January 2004
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