Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSS84
handbook, halfpage
80
MLD191
handbook, halfpage
−600
ID
MLD197
C
(pF)
60
VGS =
−10
V
−7.5
V
−6
V
(mA)
−400
−5
V
40
Ciss
20
Coss
−200
−4
V
−3
V
Crss
0
0
−10
−20
VDS (V)
−30
−2.5
V
0
0
−2
−4
−6
−8
−10
−12
VDS (V)
V
GS
= 0; T
j
= 25
°C;
f = 1 MHz.
T
j
= 25
°C.
Fig.6
Capacitance as a function of drain source
voltage; typical values.
Fig.7 Typical output characteristics.
handbook, halfpage
−600
MLD196
handbook, halfpage
60
MLD198
ID
(mA)
−400
RDSon
(Ω)
VGS =
−2.5
V
−3
V
−4
V
−5
V
40
−200
20
−7.5
V
−10
V
0
0
−2
−4
−6
−8
−10
VGS (V)
0
−1
−10
−10
2
ID (mA)
−10
3
T
j
= 25
°C.
V
DS
=
−10
V; T
j
= 25
°C.
Fig.9
Fig.8 Typical transfer characteristics.
Drain-source on-state resistance as a
function of drain current; typical values.
1997 Jun 18
5
PHILIPS [ NXP SEMICONDUCTORS ]
