NXP Semiconductors
74HC32-Q100; 74HCT32-Q100
Quad 2-input OR gate
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74HC32D-Q100
74HCT32D-Q10
74HC32PW-Q100
74HCT32PW-Q100
74HC32BQ-Q100
74HCT32BQ-Q100
40 C
to +125
C
40 C
to +125
C
TSSOP14
40 C
to +125
C
Name
SO14
Description
plastic small outline package; 14 leads; body width
3.9 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
Version
SOT108-1
SOT402-1
Type number
DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1
thin quad flat package; no leads; 14 terminals;
body 2.5
3
0.85 mm
4. Functional diagram
1
2
≥1
3
4
1
2
4
5
9
10
12
13
1A
1B
2A
2B
3A
3B
4A
4B
1Y
3
5
≥1
6
2Y
6
9
10
≥1
8
3Y
8
A
12
13
4Y
11
≥1
11
B
Y
mna241
mna242
mna243
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram (one gate)
74HC_HCT32_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 1 August 2012
2 of 15
PHILIPS [ NXP SEMICONDUCTORS ]
