NXP Semiconductors
74HC109-Q100; 74HCT109-Q100
Dual JK flip-flop with set and reset; positive-edge-trigger
Table 7.
Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V); C
L
= 50 pF unless otherwise specified; for test circuit, see
Figure 7.
Symbol Parameter
74HCT109-Q100
t
pd
propagation
delay
nCP to nQ, nQ;
see
V
CC
= 4.5 V
V
CC
= 5 V; C
L
= 15 pF
t
PLH
LOW to HIGH nSD to nQ, see
propagation
V
CC
= 4.5 V
delay
V
CC
= 5 V; C
L
= 15 pF
HIGH to LOW nSD to nQ; see
propagation
V
CC
= 4.5 V
delay
V
CC
= 5 V; C
L
= 15 pF
HIGH to LOW nRD to nQ; see
propagation
V
CC
= 4.5 V
delay
V
CC
= 5 V; C
L
= 15 pF
LOW to HIGH nRD to nQ; see
propagation
V
CC
= 4.5 V
delay
V
CC
= 5 V; C
L
= 15 pF
transition
time
pulse width
nQ, nQ; see
V
CC
= 4.5 V
nCP HIGH or LOW;
see
V
CC
= 4.5 V
nSD, nRD HIGH or LOW;
see
V
CC
= 4.5 V
t
rec
recovery time nSD, nRD to nCP;
see
V
CC
= 4.5 V
t
su
set-up time
nJ and nK to nCP;
see
V
CC
= 4.5 V
t
h
hold time
nJ and nK to nCP;
see
V
CC
= 4.5 V
f
max
maximum
frequency
nCP; see
V
CC
= 4.5 V
V
CC
= 5 V; C
L
= 15 pF
27
-
55
61
-
-
22
-
-
-
18
-
-
-
MHz
MHz
3
3
-
3
-
3
-
ns
18
8
-
23
-
27
-
ns
16
8
-
20
-
24
-
ns
16
8
-
20
-
24
-
ns
18
9
-
23
-
27
-
ns
Conditions
25
C
Min Typ
[1]
Max
40 C
to +85
C
Min
Max
40 C
to +125
C
Min
Max
Unit
-
-
-
-
-
-
-
-
-
-
-
20
17
13
14
19
14
19
15
16
15
7
35
-
26
-
35
-
35
-
32
-
15
-
-
-
-
-
-
-
-
-
-
-
44
-
-
53
-
39
-
53
-
53
-
48
-
22
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
33
-
44
-
44
-
40
-
19
-
-
-
-
-
-
-
-
-
t
PHL
t
PHL
t
PLH
t
t
t
W
74HC_HCT109_Q100
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© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 1 — 28 September 2016
9 of 17
PHILIPS [ NXP SEMICONDUCTORS ]
