NXP Semiconductors
74HC595-Q100; 74HCT595-Q100
8-bit serial-in, serial or parallel-out shift register with output latches;
3-state
Table 7.
Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V); for test circuit see
Figure 14.
Symbol Parameter
t
rec
f
max
C
PD
recovery
time
maximum
frequency
Conditions
MR to SHCP; see
SHCP and STCP;
see
and
25
C
Min Typ
[1]
Max
10
30
-
7
52
130
-
-
-
40 C
to +85
C 40 C
to +125
C
Unit
Min
13
24
-
Max
-
-
-
Min
15
20
-
Max
-
-
-
ns
MHz
pF
power
f
i
= 1 MHz; V
I
= GND to V
CC
dissipation
capacitance
Typical values are measured at nominal supply voltage.
t
pd
is the same as t
PHL
and t
PLH
.
t
pd
is the same as t
PHL
only.
t
en
is the same as t
PZL
and t
PZH
.
t
dis
is the same as t
PLZ
and t
PHZ
.
[1]
[2]
[3]
[4]
[5]
[6]
C
PD
is used to determine the dynamic power dissipation (P
D
in
W).
P
D
= C
PD
V
CC2
f
i
+
(C
L
V
CC2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
(C
L
V
CC2
f
o
) = sum of outputs;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V.
[7]
All 9 outputs switching.
12. Waveforms
1/f
max
V
I
SHCP input
GND
t
W
t
PLH
V
OH
Q
7S
output
V
OL
mna557
V
M
t
PHL
V
M
Measurement points are given in
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 9.
Shift clock pulse, maximum frequency and input to output propagation delays
74HC_HCT595_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 10 April 2013
12 of 23
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