74HC595-Q100; 74HCT595-Q100
NXP Semiconductors
8-bit serial-in, serial or parallel-out shift register with output latches;
3-state
t
W
V
I
90 %
negative
pulse
V
M
V
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
V
M
M
10 %
0 V
t
W
V
CC
V
CC
V
V
O
I
R
L
S1
G
open
DUT
R
T
C
L
001aad983
Test data is given in Table 9.
Definitions for test circuit:
CL = load capacitance including jig and probe capacitance.
RL = load resistance.
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
S1 = test selection switch.
Fig 14. Test circuit for measuring switching times
Table 9.
Type
Test data
Input
Load
CL
S1 position
tPHL, tPLH
open
VI
tr, tf
6 ns
6 ns
RL
tPZH, tPHZ
GND
tPZL, tPLZ
VCC
74HC595-Q100
VCC
50 pF
50 pF
1 k
1 k
74HCT595-Q100 3 V
open
GND
VCC
74HC_HCT595_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 10 April 2013
15 of 23
NXP [ NXP ]
