74HC595-Q100; 74HCT595-Q100
NXP Semiconductors
8-bit serial-in, serial or parallel-out shift register with output latches;
3-state
V
I
V
M
MR input
GND
t
t
rec
W
V
I
SHCP input
Q7S output
V
M
GND
t
PHL
V
OH
V
M
V
OL
mna561
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 12. Master reset to output propagation delays
t
r
t
f
90 %
V
OE input
M
10 %
t
t
PZL
PLZ
Qn output
V
LOW-to-OFF
OFF-to-LOW
M
10 %
t
t
PHZ
PZH
90 %
Qn output
V
HIGH-to-OFF
OFF-to-HIGH
M
outputs
enabled
outputs
enabled
outputs
disabled
msa697
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 13. Enable and disable times
Table 8.
Type
Measurement points
Input
VM
Output
VM
74HC595-Q100
74HCT595-Q100
0.5VCC
1.3 V
0.5VCC
1.3 V
74HC_HCT595_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 10 April 2013
14 of 23
NXP [ NXP ]
