Philips Semiconductors
Product specification
8-channel analog
multiplexer/demultiplexer
74HC/HCT4051
“4000B” series. They are specified in compliance with
JEDEC standard no. 7A.
FEATURES
• Wide analog input voltage range: ± 5 V.
The 74HC/HCT4051 are 8-channel analog
multiplexers/demultiplexers with three digital select inputs
(S0 to S2), an active LOW enable input (E), eight
independent inputs/outputs (Y0 to Y7) and a common
input/output (Z).
• Low “ON” resistance:
80 Ω (typ.) at VCC − VEE = 4.5 V
70 Ω (typ.) at VCC − VEE = 6.0 V
60 Ω (typ.) at VCC − VEE = 9.0 V
• Logic level translation:
With E LOW, one of the eight switches is selected (low
impedance ON-state) by S0 to S2. With E HIGH, all
switches are in the high impedance OFF-state,
independent of S0 to S2.
to enable 5 V logic to communicate with ± 5 V analog
signals
• Typical “break before make” built in
• Output capability: non-standard
• ICC category: MSI
VCC and GND are the supply voltage pins for the digital
control inputs (S0 to S2, and E). The VCC to GND ranges
are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The
analog inputs/outputs (Y0 to Y7, and Z) can swing between
VCC as a positive limit and VEE as a negative limit.
GENERAL DESCRIPTION
The 74HC/HCT4051 are high-speed Si-gate CMOS
devices and are pin compatible with the “4051” of the
V
CC − VEE may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEE is
connected to GND (typically ground).
QUICK REFERENCE DATA
V
EE = GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL PARAMETER
tPZH/ tPZL
TYPICAL
CONDITIONS
UNIT
HC
HCT
turn “ON” time
E to Vos
CL = 15 pF; RL = 1 kΩ;
VCC = 5 V
22
20
22
ns
Sn to Vos
24
ns
t
PHZ/ tPLZ
turn “OFF” time
E to Vos
18
19
16
20
3.5
25
ns
ns
pF
pF
Sn to Vos
CI
input capacitance
3.5
25
CPD
CS
power dissipation capacitance per switch
max. switch capacitance
independent (Y)
notes 1 and 2
5
5
pF
pF
common
(Z)
25
25
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
2
PD = CPD × VCC2 × fi + ∑ { (CL + CS ) × VCC × fo } where:
fi = input frequency in MHz
fo = output frequency in MHz
2
∑ { (CL + CS) × VCC × fo } = sum of outputs
CL = output load capacitance in pF
CS = max. switch capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
December 1990
2
NXP [ NXP ]
