Philips Semiconductors
Product specification
4-bit parallel access shift register
74HC/HCT195
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1
MR
J
master reset input (active LOW)
first stage J-input (active HIGH)
first stage K-input (active LOW)
parallel data inputs
2
3
K
4, 5, 6, 7
D0 to D3
GND
PE
8
ground (0 V)
9
parallel enable input (active LOW)
clock input (LOW-to-HIGH edge-triggered)
inverted output from the last stage
parallel outputs
10
11
CP
Q3
15, 14, 13, 12 Q0 to Q3
16
VCC
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3