74HC166-Q100; 74HCT166-Q100
NXP Semiconductors
8-bit parallel-in/serial out shift register
Table 8.
Type
Measurement points
Input
Output
VI
VM
VM
74HC166-Q100
74HCT166-Q100
VCC
3 V
0.5VCC
1.3 V
0.5VCC
1.3 V
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
CC
V
CC
V
V
O
I
R
L
S1
G
open
DUT
R
T
C
L
001aad983
Test data is given in Table 10.
Definitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch
Fig 10. Test circuit for measuring switching times
Table 9.
Type
Test data
Input
VI
Load
S1 position
tPHL, tPLH
open
tr, tf
6 ns
6 ns
CL
RL
74HC166-Q100
74HCT166-Q100
VCC
3 V
15 pF, 50 pF
15 pF, 50 pF
1 k
1 k
open
74HC_HCT166_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 25 September 2013
13 of 19
NXP [ NXP ]
