74HC00-Q100; 74HCT00-Q100
NXP Semiconductors
Quad 2-input NAND gate
Table 6.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 C
Min Typ
40 C to +85 C 40 C to +125 C Unit
Min Max Min Max
Max
74HCT00-Q100
VIH
VIL
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
-
-
1.6
1.2
-
2.0
-
2.0
-
V
V
LOW-level
-
-
0.8
-
0.8
input voltage
VOH
HIGH-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
-
-
4.5
-
-
4.4
-
-
4.4
3.7
-
-
V
V
IO = 4.0 mA
4.32
3.84
VOL
LOW-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
-
-
-
0
-
-
-
-
-
-
0.1
0.33
1
-
-
-
0.1
0.4
1
V
0.15
-
V
II
input leakage
current
VI = VCC or GND;
VCC = 6.0 V
A
ICC
ICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
-
-
-
-
-
-
-
20
-
-
40
A
A
additional
per input pin;
150
675
735
supply current VI = VCC 2.1 V; IO = 0 A;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V
CI
input
-
3.5
-
-
-
-
-
pF
capacitance
10. Dynamic characteristics
Table 7.
Dynamic characteristics
GND = 0 V; CL = 50 pF; for load circuit see Figure 7.
Symbol Parameter
Conditions
25 C
40 C to +125 C Unit
Max Max
(85 C) (125 C)
Min
Typ
Max
74HC00-Q100
[1]
tpd
propagation delay nA, nB to nY; see Figure 6
VCC = 2.0 V
-
-
-
-
25
9
-
-
-
-
115
23
-
135
27
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
7
7
20
23
[2]
[3]
tt
transition time
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
-
-
-
-
19
7
-
-
-
-
95
19
16
-
110
22
19
-
ns
ns
ns
pF
6
CPD
power dissipation per package; VI = GND to VCC
capacitance
22
74HC_HCT00_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 12 July 2012
6 of 15
NXP [ NXP ]
