74HC00-Q100; 74HCT00-Q100
NXP Semiconductors
Quad 2-input NAND gate
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 C
Min Typ
40 C to +85 C 40 C to +125 C Unit
Min Max Min Max
Max
74HC00-Q100
VIH
HIGH-level
input voltage
VCC = 2.0 V
-
-
-
-
-
-
1.2
2.4
3.2
0.8
2.1
2.8
-
1.5
-
-
-
1.5
-
-
-
V
V
V
V
V
V
VCC = 4.5 V
-
-
-
-
-
3.15
3.15
VCC = 6.0 V
4.2
4.2
VIL
LOW-level
input voltage
VCC = 2.0 V
-
-
-
0.5
-
-
-
0.5
VCC = 4.5 V
1.35
1.8
1.35
1.8
VCC = 6.0 V
VOH
HIGH-level
VI = VIH or VIL
output voltage
IO = 20 A; VCC = 2.0 V
IO = 20 A; VCC = 4.5 V
IO = 20 A; VCC = 6.0 V
-
-
-
2.0
-
-
-
-
-
1.9
-
-
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
4.5
4.4
6.0
5.9
IO = 4.0 mA; VCC = 4.5 V -
IO = 5.2 mA; VCC = 6.0 V -
VI = VIH or VIL
4.32
5.81
3.84
5.34
VOL
LOW-level
output voltage
IO = 20 A; VCC = 2.0 V
O = 20 A; VCC = 4.5 V
-
-
-
-
-
-
0
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.33
0.33
1
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
1
V
I
0
V
IO = 20 A; VCC = 6.0 V
IO = 4.0 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
0
V
0.15
0.16
-
V
V
II
input leakage
current
VI = VCC or GND;
VCC = 6.0 V
A
ICC
CI
supply current VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
-
-
-
-
-
-
-
20
-
-
-
40
-
A
input
3.5
pF
capacitance
74HC_HCT00_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 12 July 2012
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