PE3336
Product Specification
Figure 2. Pin Configurations (Top View)
48 47 46 45 44 43 42 41 40 39 38 37
6
5
4
3
2
1
44 43 42 41 40
D0, M0
D1, M1
fc
7
8
39
38
37
36
35
34
33
32
31
30
29
fc
VDD_fc
PD_U
PD_D
VDD
D0, M0
D1, M1
D2, M2
1
2
3
4
5
6
7
8
9
36
35
VDD_fc
D2, M2
9
34 NC
D3, M3
10
11
12
13
14
15
16
17
D3, M3
VDD
PD_U
33
32
31
30
29
28
27
26
25
VDD
PD_D
VDD
Cext
VDD
GND
VDD
S_WR, D4, M4
Sdata, D5, M5
Sclk, D6, M6
FSELS, D7, Pre_en
GND
VDD
S_WR, D4, M4
Cext
Sdata, D5, M5
Sclk, D6, M6
Dout
VDDE
Dout
VDD_fp
fp
VDD_fp
fp
FSELS, D7, Pre_en 10
GND
11
GND
FSELP, A0
12
18 19 20 21 22 23 24 25 26 27 28
13 14 15 16 17 18 19 20 21 22 23 24
44-lead PLCC
48-lead QFN
Table 1. Pin Descriptions
Pin No.
Pin No.
Pin
Name
Interface
Mode
Type
Description
(44-lead PLCC)
(48-lead QFN)
Power supply input. Input may range from 2.85 V to 3.15 V.
Bypassing recommended.
1
43
VDD
ALL
(Note 1)
2
3
4
5
6
44
45
46
47
48
R0
Direct
Direct
Direct
Direct
ALL
Input
R Counter bit0 (LSB).
R Counter bit1.
R1
Input
R2
Input
R Counter bit2.
R3
Input
R Counter bit3.
GND
D0
(Note 1)
Input
Ground.
Parallel
Direct
Parallel
Direct
Parallel
Direct
Parallel
Direct
ALL
Parallel data bus bit0 (LSB).
M Counter bit0 (LSB).
Parallel data bus bit1.
M Counter bit1.
7
8
1
2
3
4
M0
D1
Input
Input
M1
D2
Input
Input
Parallel data bus bit2.
M Counter bit2.
9
M2
D3
Input
Input
Parallel data bus bit3.
M Counter bit3.
10
M3
VDD
VDD
Input
11
12
5
6
(Note 1)
(Note 1)
Same as pin 1.
ALL
Same as pin 1.
©2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0033-02 │ UltraCMOS™ RFIC Solutions
Page 3 of 15
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