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OX16C950-PCC60-B 参数 Datasheet PDF下载

OX16C950-PCC60-B图片预览
型号: OX16C950-PCC60-B
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能UART与128字节的FIFO [High Performance UART with 128 byte FIFOs]
分类和应用: 先进先出芯片
文件页数/大小: 49 页 / 436 K
品牌: OXFORD [ OXFORD SEMICONDUCTOR ]
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OX16C950 rev B  
OXFORD SEMICONDUCTOR LTD.  
12 OTHER STANDARD REGISTERS  
12.1 Divisor Latch Registers ‘DLL & DLM’  
12.2 Scratch Pad Register ‘SPR’  
The divisor latch registers are used to program the baud  
rate divisor. This is a value between 1 and 65535 by which  
the input clock is divided by in order to generate serial  
baud rates. After a hardware reset, the baud rate used by  
the transmitter and receiver is given by:  
The scratch pad register does not affect operation of the  
rest of the UART in any way and can be used for  
temporary data storage. The register may also be used to  
define an offset value to access the registers in the  
Indexed Control Register set. For more information on  
Indexed Control registers see Table 7 and section 15.  
InputClock  
16* Divisor  
Baudrate =  
Where divisor is given by DLL + ( 256 x DLM ). More  
flexible baud rate generation options are also available.  
See section 14 for full details.  
Data Sheet Revision 1.2  
Page 27  
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