UC3844, UC3845, UC2844, UC2845
V
in
V
CC
V
CC
7(12)
36V
V
+
−
ref
Reference
Regulator
8(14)
V
CC
UVLO
+
R
R
Internal
Bias
−
2.5V
+
V
C
−
+
R
T
7(11)
V
ref
UVLO
3.6V
−
Q1
Output
6(10)
Oscillator
4(7)
2(3)
T Q
+
C
T
1.0mA
Power Ground
5(8)
S
R
+
−
Q
−
+
Voltage Feedback
Input
PWM
Latch
2R
Error
Amplifier
R
Current Sense Input
3(5)
1.0V
Output
Compensation
1(1)
Current Sense
Comparator
R
S
GND 5(9)
+
−
Sink Only
Positive True Logic
=
Pin numbers in parenthesis are for the D suffix SOIC−14 package.
Figure 16. Representative Block Diagram
Capacitor C
T
Latch
‘‘Set’’ Input
Output/
Compensation
Current Sense
Input
Latch
‘‘Reset’’ Input
Output
Large R /Small C
T
Small R /Large C
T T
T
Figure 17. Timing Diagram
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