RSL10
• ꢈꢇ᧧Φꢆᆊ꣱ͷĹꢖ(CRC)ᰁष，✈nƽ✈ᐗ
• ꢈꢇ꤫ꥌꢆSPIᖅ׃
，
ईꢉᰁჯ٬
®ᰁჯꢆꢿꣀ。
• ꢀꢇტꢂᕂࡈ
(ASRC)ᰁष٬
ꢒꢓǁඟ៖ꢏ
2
• ꢀꢇ꣓ꥂꤵᙱ៖ࡈ
，✈nꤘ꣠RSL10ᜥꥒၖꢳꢴቂ
૭。
• ꢈꢇPWM (ꤩΒඝႆ꣐Ж)꣙҈ࡈ
，
ईᓧൺꢓꢂ⛻
• ࢻ
ꢇ32ĭꤪꢉꢅ҈ᙱᝐࡈ
。꤃{ᙱᝐࡈ
ဎ҉Ϧᥰ
ꢢꢣꢾꢴ៖，Å֪ၴ✈ꢆş✈fૺArm
Cortex−M3◦ࡈ
、LPDSP32٬
ꢟസ。꤃{ǁෙ
• ꢀꢇ֬ꢨ꣯ᝐഷ꣖̫꣗(DMIC)꣘ͅ
• ꢀꢇIPƽᒄꢢꢣ，✈nƽꢟസͥៀ꣨ꥃ꣧⛹យ
• ꢀꢇ✈nArm Cortex−M3◦ࡈ
ꢆ SWJ−DP ᖅ׃
RSL10ꣅᣩ16ꢇDIO꣤꣥(ᝐഷ꣘ͅ/꣘Ϛ)，ध
ᓧൺ
RSL10ѿ૧。ꢨꢱΒई꤃{ᆊ꣱ꢆꥑֶꢆ꣦ၯᝧ
ᚎ
꣔10ϷϚfRSL10ᐠ꤅ᖅꢆസʈࡈ
ꢲᥤ，Å֪פ
സ
• ꢀꢇDMA (ꤨᖅസʈࡈ
꣫꣬)ᖇЖࡈ
，✈nईو
ꢼᚎ
Arm Cortex−M3◦ࡈ
꣫꣬。ADC
ꥑֶ4ꢇꣁȜ
(DIO[0]−DIO[3])、AOUT、VDDC、VBAT/2٬
ADCꢵɟȜ。
Table 10. RSL10 MEMORY STRUCTURES
Memory type
Program memory (ROM)
Program memory (RAM)
Program memory (RAM)
Data memory (RAM)
Data memory (RAM)
Data memory (RAM)
Data memory (RAM)
Flash
Data Width
Memory Size
Accessed by
32
32
40
32
32
32
32
32
4 kB
Arm Cortex−M3 processor
4 instances of 8 kB
4 instances of 10 kB
1 instances of 8 kB
2 instances of 8 kB
6 instances of 8 kB
2 instances of 8 kB
384 kB
Arm Cortex−M3 processor
LPDSP32 / Arm Cortex−M3 processor
Arm Cortex−M3 processor
Arm Cortex−M3 processor / LPDSP32
LPDSP32 / Arm Cortex−M3 processor
Baseband / Arm Cortex−M3 processor
Arm Cortex−M3 processor / Flash copier
ൿ᧧ᚖ
⋪ǁ
• ꢡꢢϷ：0x09
RSL10 QFNꤐ✈ᐠᣩRoHS᧧Φר
ꢽꣲꢆꢬ
സ ʈ ٬
◦ 。꤆ ថ ࢾ
ꢌ ꣤ ᖅ ᓩIPC/JEDEC ᧧ Φ
J−STD−020C，֪ꤔר
ꢴ✊᧧Φ：ࢾ
ꢌᜯዿႆϦꥡꥢඦ
• ꢡꤱᤌ：0x01
• ꢡǎꤱᤌ：0x01
ᄳꢆESDꤕ꣩ᖊឝ，̭ሇ்⛻ѿ்ꢋ。
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