RSL10
Table 9. CHIP INTERFACE SPECIFICATIONS
Power
Domain
Pad #,
WLCSP
Pad #,
QFN48
Pad Name
VBAT
Description
Battery input voltage
I/O
I
A/D
P
Pull
VBAT
K5,K7,K10
J11
K11
L10
L11
E10
F8
9
10
12
14
13
8
VDC
DC−DC output voltage to external LC filter
DC−DC filtered output
O
A
VCC
I
P/A
A
XTAL32_IN
XTAL32_OUT
VSSA
Xtal input pin for 32 kHz xtal
Xtal output pin for 32 kHz xtal
Analog ground
I/O
I/O
I/O
I
A
P
RES
RESERVED
D
D
11
5
VDDA
Charge pump output for analog and flash supplies
LDO’s output for radio voltage supply
Pump capacitor connection
VDDA
VDDRF_SW
VDDPA
I/O
I/O
O
P/A
P/A
A
F11
A11
H11
G10
L6
VDDRF
CAP0
48
7
CAP1
Pump capacitor connection
O
A
6
AOUT
Analog test pin
O
A
4
VDDRF_SW
VDDSYN_SW
VSSRF
XTAL48_N
XTAL48_P
VDDPA
VSSPA
RF
Supply pin for the RF
P/A
P/A
P
A9
47
45
46
43
44
2
Supply pin for the radio synthesizer
RF analog ground
B8
I/O
I/O
I/O
I/O
I/O
I/O
I/O
B9
Negative input for the 48 MHz xtal block
Positive input for the 48 MHz xtal block
Radio power amplifier voltage supply
Radio power amplifier ground
RF signal input/output (Antenna)
Flash high voltage access
A
A6
A
A8
P/A
P
C11
D11
B11
J6
3
RF
A
1
VPP
VPP
A
17
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