MC100EL39
ORDERING INFORMATION
Device
†
Package
Package
MC100EL39DW
SOIC−20
38 Units / Rail
38 Units / Rail
MC100EL39DWG
SOIC−20
(Pb−Free)
MC100EL39DWR2
MC100EL39DWR2G
SOIC−20
1000 / Tape & Reel
1000 / Tape & Reel
SOIC−20
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
−
−
−
−
−
−
−
−
−
−
−
ECL Clock Distribution Techniques
Designing with PECL (ECL at +5.0 V)
ECLinPS I/O SPiCE Modeling Kit
Metastability and the ECLinPS Family
Interfacing Between LVDS and ECL
The ECL Translator Guide
Odd Number Counters Design
Marking and Date Codes
Termination of ECL Logic Devices
Interfacing with ECLinPS
AC Characteristics of ECL Devices
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