CAT93C86
Table 4. PIN CAPACITANCE (Note 5)
Symbol Test
Conditions
= 0 V
Min
Typ
Max
5
Units
pF
C
Output Capacitance (DO)
V
OUT
OUT
C
Input Capacitance (CS, SK, DI, ORG)
V
IN
= 0 V
5
pF
IN
Table 5. POWER−UP TIMING (Notes 5, 6)
Symbol Parameter
Max
1
Units
t
Power−up to Read Operation
Power−up to Write Operation
ms
ms
PUR
t
1
PUW
Table 6. A.C. TEST CONDITIONS
Input Rise and Fall Times
Input Pulse Voltages
≤ 50 ns
0.4 V to 2.4 V
0.8 V, 2.0 V
4.5 V ≤ V ≤ 5.5 V
CC
Timing Reference Voltages
Input Pulse Voltages
4.5 V ≤ V ≤ 5.5 V
CC
0.2 x V to 0.7 x V
1.8 V ≤ V ≤ 4.5 V
CC
CC
CC
Timing Reference Voltages
0.5 x V
1.8 V ≤ V ≤ 4.5 V
CC
CC
Table 7. A.C. CHARACTERISTICS
V
CC
=
V
CC
=
V
CC
=
1.8 V − 5.5 V
2.5 V − 5.5 V
4.5 V − 5.5 V
Min
200
0
Max
Min
100
0
Max
Min
50
0
Max
Symbol
Parameter
CS Setup Time
Test Conditions
Units
ns
t
CSS
t
CS Hold Time
ns
CSH
t
DI Setup Time
200
200
100
100
50
50
ns
DIS
t
DI Hold Time
ns
DIH
t
Output Delay to 1
1
1
0.5
0.5
200
5
0.15
0.15
100
5
ms
PD1
PD0
t
Output Delay to 0
C = 100 pF (Note 7)
L
ms
t
(Note 5)
Output Delay to High−Z
Program/Erase Pulse Width
Minimum CS Low Time
Minimum SK High Time
Minimum SK Low Time
Output Delay to Status Valid
Maximum Clock Frequency
400
5
ns
HZ
t
ms
ms
EW
t
1
1
1
0.5
0.5
0.5
0.15
0.15
0.15
CSMIN
t
ms
SKHI
t
ms
SKLOW
t
1
0.5
0.1
ms
SV
SK
DC
500
DC
1000
DC
3000
kHz
MAX
5. These parameters are tested initially and after a design or process change that affects the parameter.
6. t
and t
are the delays required from the time V is stable until the specified operation can be initiated.
PUR
PUW CC
7. The input levels and timing reference points are shown in the “A.C. Test Conditions” table.
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